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74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
March 1995 Revised January 2001
74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
General Description
The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH
Features
s 5V tolerant inputs s 2.3V-3.6V VCC specifications provided s 7.0 ns tPD max (VCC = 3.3V), 10 A ICC max s Power down high impedance inputs and outputs s 24 mA output drive (VCC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 200V
Ordering Code:
Order Number 74LCX74M 74LCX74SJ 74LCX74MTC Package Number M14A M14D MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names D1 , D2 CP1, CP2 CD1, CD2 SD1, SD2 Q1, Q1, Q2, Q2 Description Data Inputs Clock Pulse Inputs Direct Clear Inputs Direct Set Inputs Outputs
(c) 2001 Fairchild Semiconductor Corporation
DS012414
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74LCX74
Logic Symbols
Truth Table
(Each Half) Inputs SD L H L H H H CD H L L H H H CP X X D X X X H L X Outputs Q H L H H L Q0 Q L H H L H Q0

L
X
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock Transition Q0(Q0) = Previous Q(Q) before LOW-to-HIGH Transition of Clock
IEEE/IEC
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74LCX74
Absolute Maximum Ratings(Note 1)
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG Parameter Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source/Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Value Conditions Units V V Output in HIGH or LOW State (Note 2) VI < GND VO < GND VO > VCC V mA mA mA mA mA
-0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 -50 -50 +50 50 100 100 -65 to +150
C
Recommended Operating Conditions (Note 4)
Symbol VCC VI VO IOH/IOL Supply Voltage Input Voltage Output Voltage Output Current HIGH or LOW State VCC = 3.0V - 3.6V VCC = 2.7V - 3.0V VCC = 2.3V - 2.7V TA Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V-2.0V, VCC = 3.0V Parameter Operating Data Retention Min 2.0 1.5 0 0 Max 3.6 3.6 5.5 VCC Units V V V mA
24 12 8 -40
0 85 10
C
ns/V
t/V
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: IO Absolute Maximum Rating must be observed. Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage IOH = -100A IOH = -8 mA IOH = -12 mA IOH = -18 mA IOH = -24 mA VOL LOW Level Output Voltage IOL = 100A IOL = 8mA IOL = 12 mA IOL = 16 mA IOL = 24 mA II IOFF ICC ICC Input Leakage Current Power-Off Leakage Current Quiescent Supply Current Increase in ICC per Input 0 VI 5.5V VI or VO = 5.5V VI = V CC or GND 3.6V VI 5.5V VIH = VCC -0.6V Conditions VCC (V) 2.3 - 2.7 2.7 - 3.6 2.3 - 2.7 2.3 - 3.6 2.3 - 3.6 2.3 2.7 3.0 3.0 2.3 - 3.6 2.3 2.7 3.0 3.0 2.3 - 3.6 0 2.3 - 3.6 2.3 - 3.6 2.3 - 3.6 VCC - 0.2 1.8 2.2 2.4 2.2 0.2 0.6 0.4 0.4 0.55 5.0 10 10 10 500 A A A A V V TA = -40C to +85C Min 1.7 2.0 0.7 0.8 Max V V Units
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74LCX74
AC Electrical Characteristics
TA = -40C to +85C, RL = 500 Symbol Parameter VCC = 3.3V 0.3V CL = 50 pF Min fMAX tPHL tPLH tPHL tPLH tS tH tW tW tREC tOSHL tOSLH Maximum Clock Frequency Propagation Delay CPn to Qn or Qn Propagation Delay CDn or SDn to Qn or Qn Setup Time Hold Time Pulse Width CP Pulse Width and CD, SD Recovery Time Output to Output Skew (Note 4) 150 1.5 1.5 1.5 1.5 2.5 1.5 3.3 3.3 2.5 1.0 1.0 7.0 7.0 7.0 7.0 Max VCC = 2.7V CL = 50 pF Min 150 1.5 1.5 1.5 1.5 2.5 1.5 3.3 3.6 3.0 8.0 8.0 8.0 8.0 Max VCC = 2.5V 0.2V CL = 30 pF Min 150 1.5 1.5 1.5 1.5 4.0 2.0 4.0 4.0 4.5 8.4 8.4 8.4 8.4 Max MHz ns ns ns ns ns ns ns ns Units
Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Peak VOL Conditions CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V VCC (V) 3.3 2.5 3.3 2.5 TA = 25C Typical 0.8 0.6 -0.8 -0.6 V V Unit
Capacitance
Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance Parameter Conditions VCC = Open, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC, f = 10 MHz Typical 7 8 25 Units pF pF pF
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74LCX74
AC Loading and Waveforms Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test tPLH, tPHL tPZL, tPLZ tPZH,tPHZ Switch Open 6V at VCC = 3.3 0.3V VCC x 2 at VCC = 2.5 0.2V GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output Low Enable and Disable Times for Logic
Propagation Delay, Pulse Width and trec Waveforms
Setup Time, Hold TIme and Recovery TIme for Logic
3-STATE Output High Enable and Disable TImes for Logic FIGURE 2. Waveforms
trise and tfall
(Input Pulse Characteristics; f = 1MHz, tr = tf = 3ns) Symbol Vmi Vmo Vx Vy VCC 3.3V 0.3V 1.5V 1.5V VOL + 0.3V VOH - 0.3V 2.7V 1.5V 1.5V VOL + 0.3V VOH - 0.3V 2.5V 0.2V VCC/2 VCC/2 VOL + 0.15V VOH - 0.15V
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74LCX74
Schematic Diagram Generic for LCX Family
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74LCX74
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M14A
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74LCX74
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D
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74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 9 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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